(1) Field of the Invention
The present invention relates to nonvolatile semiconductor memory devices, and more specifically relates to write operation of a nonvolatile semiconductor memory device having two bit cells for storing opposite logic states.
(2) Description of the Related Art
With recent size reduction in fabrication processes, the thickness of transistor oxide films has been reduced. In conventional memory cells, this thickness reduction causes a problem in which leakage current or the like occurs in gate oxide films of MOS transistors to degrade data retention characteristics. With the process of determining data by comparing a voltage stored in a memory cell with a given threshold value, it has become more difficult to suppress reliability deterioration caused by the size reduction.
In view of this, a so-called differential cell formed by two bit cells and a differential amplifier has been already devised (see, for example, Japanese Unexamined Patent Publication No. 3-120759). In a nonvolatile semiconductor memory device of this type, in data write operation, data representing opposite logic states is accumulated in respective two bit cells according to the level of a threshold voltage, for example. Then, in read operation, the differential amplifier reads the potentials at the two bit cells, amplifies the potential difference and outputs the amplified difference as read-out data.
In a memory device using this differential cell, the influence of charge leakage from a memory cell is small and a large noise margin is secured, as compared to a memory device which determines data by comparing a voltage stored in a memory cell with a threshold value. That is, the use of the differential cells provides a nonvolatile semiconductor memory device having excellent data retention characteristics.